Watchdog timers are well known for detecting failures in processors. A watchdog timer is particularly useful for protecting processors against failures caused by noise induced software malfunctions which can cause control or protection malfunctions. A typical watchdog timer monitors software functions by producing a non-maskable interrupt when a reset pulse is not produced within a predetermined time interval. The reset pulse is typically produced cyclically by a monostable multivibrator during execution of the software by the processor when a fault condition does not exist. During normal operation, the watchdog timer is cleared by a reset signal before the watchdog timer times out. U.S. Pat. Nos. 3,795,800, 3,909,795, 3,919,533, 4,405,982, 4,477,870 and 4,538,273 disclose examples of timers utilized for monitoring the operation of processors. Patent No. 3,919,533 discloses a watchdog timer which periodically provides a code to a decoder network cyclically during an interval having a period shorter than a predetermined time interval of the timing network so that a fault is continuously inhibited as long as the code is continuously supplied with the desired periodicity. None of the aforementioned systems disclose testing procedures for watchdog timers.
In applications where critical functions are performed under the control of a programmed processor, such as aircraft power generating systems or control mechanisms for wing actuators, it is of importance to insure that the watchdog timer itself is operational. For example, electromagnetic interference (EMI) noise could produce a false reset pulse which would mask the presence of a malfunction in the watchdog timer. Furthermore, a line for coupling reset pulses to the processor could fail in a high state or the processor could be in a loop which is a fault condition which causes reset pulses to be sent continually within the cyclical time interval of the watchdog timer which masks the presence of a fault condition.